Impedance Analyser Based Tomography System

A Chondronasios1, W Q Yang1 and V T Nguyen2

1 Dept of Electrical Engineering and Electronics, UMIST, PO Box 88, Manchester M60 1QD, UK Achondronasios@stud.umist.ac.uk, yang@fs5.ee.umist.ac.uk

2 Shell Global Solutions, Shell Research Ltd, PO Box 1, Chester CH1 3SH, UK Thuan.T.Nguyen@OPC.shell.com

ABSTRACT

Most current electrical capacitance tomography (ECT) systems employ specially designed capacitance measuring circuits to measure small capacitance (typically < 0.1pF) and to achieve a high data acquisition rate (typically 100 frames per second for a 12-electrode system). This paper presents an ECT system based on an HP4284 impedance analyser. It provides high resolution and high accuracy but at low data acquisition rates. Together with an iterative image reconstruction algorithm, this system is capable of imaging very low permittivity materials, with an effective permittivity of less than 1.07.

Keywords Impedance analyser, Capacitance measurement, System design, Adaptive calibration